EPMDI has strong expertise in selecting the Packaging materials, designs, processes, and performing package reliability finite element method (FEM) simulations. We:
- have around 15 years of experience in working at semi-conductor companies/high-tech organizations like ASML, NXP, AMPLEON, and CITC.

- can support you in finding the right (/optimal) packaging solution.
- have a proven track record of applying our expertise and were successful in finding the packaging solutions that met product or reliability requirements.  
- have been successful in patenting our Innovative packaging Ideas (or solutions) while working for NXP and CITC. Examples:
    - Integrated circuits and molding approaches therefor, Patent number: 9842776, succesfully made a 

      prototype of world's thinnest wafer level chip scale package (WLCSP)
    - Integrated circuit comprising improved die attach layer, Patent Pending: eu 100574NL, to improve the

      reliability of package
- would like to bridge the gap between the semiconductor business demands and stakeholders such as material suppliers and back-end packaging world. 

- around 10 year of experience in FEM simulations in application areas such as Semi-conductor packaging.